Download Charge-Sharing SAR ADCs for Low-Voltage Low-Power by Taimur Rabuske, Jorge Fernandes PDF

By Taimur Rabuske, Jorge Fernandes

This publication introduces readers to the potential for charge-sharing (CS) successive approximation check in (SAR) analog-to-digital converters (ADCs), whereas supplying wide research of the criteria that restrict the functionality of the CS topology. The authors current instructions and priceless recommendations for mitigating the constraints of the structure, whereas targeting the implementation less than limited energy budgets and voltage supplies.

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References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Introduction A switching scheme, in the context of capacitive SAR ADCs, comprehends the arrangement of switches and capacitors in the DAC, the sequence in which these switches are turned on and off, and the nodes to which these switches connect the capacitors.

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6. The ADC has an improved efficiency by operating in only one of the arrays of a differential implementation. Initially, the bottom plates of all capacitors are grounded, and the input signal is sampled on their top plates. After the MSB is obtained by the comparator, the SAR logic switches the bottom plates of the whole array which sampled the lower voltage to VCM . This operation causes the voltage on the array to grow by VREF =2, which enables MSB 1 to be determined. 3 Charge Redistribution Switching Schemes Fig.

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